| 1 | package com.rox.apu; | |
| 2 | ||
| 3 | import com.rox.clock.ClockWatcher; | |
| 4 | import com.rox.mem.MemoryBus; | |
| 5 | ||
| 6 | import java.util.List; | |
| 7 | ||
| 8 | /** | |
| 9 | * NES Audio Processing Unit, mapped into $4000-$4017. Owns the frame counter and all five channels | |
| 10 | * (both pulse, triangle, noise, DMC), including $4015 enable/status and the combined IRQ line | |
| 11 | * ({@link #isIrqAsserted()}) that a caller wires into the CPU. | |
| 12 | */ | |
| 13 | public class APU implements ClockWatcher, MemoryBus { | |
| 14 | public static final int STATUS_REGISTER_ADDRESS = 0x4015; | |
| 15 | public static final int FRAME_COUNTER_ADDRESS = 0x4017; | |
| 16 | ||
| 17 | private static final int PULSE1_CONTROL_ADDRESS = 0x4000; | |
| 18 | private static final int PULSE1_SWEEP_ADDRESS = 0x4001; | |
| 19 | private static final int PULSE1_TIMER_LOW_ADDRESS = 0x4002; | |
| 20 | private static final int PULSE1_TIMER_HIGH_ADDRESS = 0x4003; | |
| 21 | ||
| 22 | private static final int PULSE2_CONTROL_ADDRESS = 0x4004; | |
| 23 | private static final int PULSE2_SWEEP_ADDRESS = 0x4005; | |
| 24 | private static final int PULSE2_TIMER_LOW_ADDRESS = 0x4006; | |
| 25 | private static final int PULSE2_TIMER_HIGH_ADDRESS = 0x4007; | |
| 26 | ||
| 27 | private static final int TRIANGLE_LINEAR_COUNTER_ADDRESS = 0x4008; | |
| 28 | private static final int TRIANGLE_TIMER_LOW_ADDRESS = 0x400A; | |
| 29 | private static final int TRIANGLE_TIMER_HIGH_ADDRESS = 0x400B; | |
| 30 | ||
| 31 | private static final int NOISE_CONTROL_ADDRESS = 0x400C; | |
| 32 | private static final int NOISE_MODE_AND_PERIOD_ADDRESS = 0x400E; | |
| 33 | private static final int NOISE_LENGTH_LOAD_ADDRESS = 0x400F; | |
| 34 | ||
| 35 | private static final int DMC_CONTROL_ADDRESS = 0x4010; | |
| 36 | private static final int DMC_DIRECT_LOAD_ADDRESS = 0x4011; | |
| 37 | private static final int DMC_SAMPLE_ADDRESS_ADDRESS = 0x4012; | |
| 38 | private static final int DMC_SAMPLE_LENGTH_ADDRESS = 0x4013; | |
| 39 | ||
| 40 | private static final int PULSE1_ENABLE_BIT = 0x01; | |
| 41 | private static final int PULSE2_ENABLE_BIT = 0x02; | |
| 42 | private static final int TRIANGLE_ENABLE_BIT = 0x04; | |
| 43 | private static final int NOISE_ENABLE_BIT = 0x08; | |
| 44 | private static final int DMC_ENABLE_BIT = 0x10; | |
| 45 | ||
| 46 | private static final int PULSE1_STATUS_BIT = 0x01; | |
| 47 | private static final int PULSE2_STATUS_BIT = 0x02; | |
| 48 | private static final int TRIANGLE_STATUS_BIT = 0x04; | |
| 49 | private static final int NOISE_STATUS_BIT = 0x08; | |
| 50 | private static final int DMC_ACTIVE_BIT = 0x10; | |
| 51 | private static final int FRAME_IRQ_FLAG = 0x40; | |
| 52 | private static final int DMC_IRQ_FLAG = 0x80; | |
| 53 | ||
| 54 | private final FrameSequencer frameSequencer; | |
| 55 | private final PulseChannel pulse1; | |
| 56 | private final PulseChannel pulse2; | |
| 57 | private final TriangleChannel triangle; | |
| 58 | private final NoiseChannel noise; | |
| 59 | private final DMCChannel dmc; | |
| 60 | ||
| 61 | public APU(final MemoryBus memoryBus){ | |
| 62 | this(new FrameSequencer(), | |
| 63 | new PulseChannel(true), | |
| 64 | new PulseChannel(false), | |
| 65 | new TriangleChannel(), | |
| 66 | new NoiseChannel(), | |
| 67 | new DMCChannel(memoryBus) | |
| 68 | ); | |
| 69 | } | |
| 70 | ||
| 71 | APU(final FrameSequencer frameSequencer, final PulseChannel pulse1, final PulseChannel pulse2, | |
| 72 | final TriangleChannel triangle, final NoiseChannel noise, final DMCChannel dmc){ | |
| 73 | this.frameSequencer = frameSequencer; | |
| 74 | this.pulse1 = pulse1; | |
| 75 | this.pulse2 = pulse2; | |
| 76 | this.triangle = triangle; | |
| 77 | this.noise = noise; | |
| 78 | this.dmc = dmc; | |
| 79 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addQuarterFrameWatcher → KILLED |
frameSequencer.addQuarterFrameWatcher(pulse1::quarterFrameTick); |
| 80 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addQuarterFrameWatcher → KILLED |
frameSequencer.addQuarterFrameWatcher(pulse2::quarterFrameTick); |
| 81 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addQuarterFrameWatcher → KILLED |
frameSequencer.addQuarterFrameWatcher(triangle::quarterFrameTick); |
| 82 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addQuarterFrameWatcher → KILLED |
frameSequencer.addQuarterFrameWatcher(noise::quarterFrameTick); |
| 83 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addHalfFrameWatcher → KILLED |
frameSequencer.addHalfFrameWatcher(pulse1::halfFrameTick); |
| 84 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addHalfFrameWatcher → KILLED |
frameSequencer.addHalfFrameWatcher(pulse2::halfFrameTick); |
| 85 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addHalfFrameWatcher → KILLED |
frameSequencer.addHalfFrameWatcher(triangle::halfFrameTick); |
| 86 |
1
1. <init> : removed call to com/rox/apu/FrameSequencer::addHalfFrameWatcher → KILLED |
frameSequencer.addHalfFrameWatcher(noise::halfFrameTick); |
| 87 | } | |
| 88 | ||
| 89 | @Override | |
| 90 | public void tick() { | |
| 91 |
1
1. tick : removed call to java/util/List::forEach → KILLED |
List.of(frameSequencer, pulse1, pulse2, triangle, noise, dmc).forEach(ClockWatcher::tick); |
| 92 | } | |
| 93 | ||
| 94 | @Override | |
| 95 | public int read(final int address) { | |
| 96 |
1
1. read : negated conditional → KILLED |
if (address == STATUS_REGISTER_ADDRESS){ |
| 97 |
1
1. read : replaced int return with 0 for com/rox/apu/APU::read → KILLED |
return readStatusRegister(); |
| 98 | } | |
| 99 | return 0; | |
| 100 | } | |
| 101 | ||
| 102 | @Override | |
| 103 | public void write(final int address, final int value) { | |
| 104 | switch (address){ | |
| 105 |
1
1. write : removed call to com/rox/apu/APU::writeStatusRegister → KILLED |
case STATUS_REGISTER_ADDRESS -> writeStatusRegister(value); |
| 106 |
1
1. write : removed call to com/rox/apu/FrameSequencer::writeControlRegister → KILLED |
case FRAME_COUNTER_ADDRESS -> frameSequencer.writeControlRegister(value); |
| 107 | ||
| 108 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeControlRegister → KILLED |
case PULSE1_CONTROL_ADDRESS -> pulse1.writeControlRegister(value); |
| 109 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeSweepRegister → KILLED |
case PULSE1_SWEEP_ADDRESS -> pulse1.writeSweepRegister(value); |
| 110 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeTimerLow → KILLED |
case PULSE1_TIMER_LOW_ADDRESS -> pulse1.writeTimerLow(value); |
| 111 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeTimerHighAndLengthLoad → KILLED |
case PULSE1_TIMER_HIGH_ADDRESS -> pulse1.writeTimerHighAndLengthLoad(value); |
| 112 | ||
| 113 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeControlRegister → KILLED |
case PULSE2_CONTROL_ADDRESS -> pulse2.writeControlRegister(value); |
| 114 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeSweepRegister → KILLED |
case PULSE2_SWEEP_ADDRESS -> pulse2.writeSweepRegister(value); |
| 115 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeTimerLow → KILLED |
case PULSE2_TIMER_LOW_ADDRESS -> pulse2.writeTimerLow(value); |
| 116 |
1
1. write : removed call to com/rox/apu/PulseChannel::writeTimerHighAndLengthLoad → KILLED |
case PULSE2_TIMER_HIGH_ADDRESS -> pulse2.writeTimerHighAndLengthLoad(value); |
| 117 | ||
| 118 |
1
1. write : removed call to com/rox/apu/TriangleChannel::writeLinearCounterRegister → KILLED |
case TRIANGLE_LINEAR_COUNTER_ADDRESS -> triangle.writeLinearCounterRegister(value); |
| 119 |
1
1. write : removed call to com/rox/apu/TriangleChannel::writeTimerLow → KILLED |
case TRIANGLE_TIMER_LOW_ADDRESS -> triangle.writeTimerLow(value); |
| 120 |
1
1. write : removed call to com/rox/apu/TriangleChannel::writeTimerHighAndLengthLoad → KILLED |
case TRIANGLE_TIMER_HIGH_ADDRESS -> triangle.writeTimerHighAndLengthLoad(value); |
| 121 | ||
| 122 |
1
1. write : removed call to com/rox/apu/NoiseChannel::writeControlRegister → KILLED |
case NOISE_CONTROL_ADDRESS -> noise.writeControlRegister(value); |
| 123 |
1
1. write : removed call to com/rox/apu/NoiseChannel::writeModeAndPeriod → KILLED |
case NOISE_MODE_AND_PERIOD_ADDRESS -> noise.writeModeAndPeriod(value); |
| 124 |
1
1. write : removed call to com/rox/apu/NoiseChannel::writeLengthLoad → KILLED |
case NOISE_LENGTH_LOAD_ADDRESS -> noise.writeLengthLoad(value); |
| 125 | ||
| 126 |
1
1. write : removed call to com/rox/apu/DMCChannel::writeControlRegister → KILLED |
case DMC_CONTROL_ADDRESS -> dmc.writeControlRegister(value); |
| 127 |
1
1. write : removed call to com/rox/apu/DMCChannel::writeDirectLoad → KILLED |
case DMC_DIRECT_LOAD_ADDRESS -> dmc.writeDirectLoad(value); |
| 128 |
1
1. write : removed call to com/rox/apu/DMCChannel::writeSampleAddress → KILLED |
case DMC_SAMPLE_ADDRESS_ADDRESS -> dmc.writeSampleAddress(value); |
| 129 |
1
1. write : removed call to com/rox/apu/DMCChannel::writeSampleLength → KILLED |
case DMC_SAMPLE_LENGTH_ADDRESS -> dmc.writeSampleLength(value); |
| 130 | ||
| 131 | default -> { } | |
| 132 | } | |
| 133 | } | |
| 134 | ||
| 135 | /** | |
| 136 | * Handle a $4015 write: sets each channel's enable state from bits 0-4, then unconditionally | |
| 137 | * clears the DMC-IRQ flag (real hardware does this regardless of the value written). | |
| 138 | */ | |
| 139 | private void writeStatusRegister(final int value){ | |
| 140 |
3
1. writeStatusRegister : negated conditional → KILLED 2. writeStatusRegister : Replaced bitwise AND with OR → KILLED 3. writeStatusRegister : removed call to com/rox/apu/PulseChannel::setEnabled → KILLED |
pulse1.setEnabled((value & PULSE1_ENABLE_BIT) != 0); |
| 141 |
3
1. writeStatusRegister : Replaced bitwise AND with OR → KILLED 2. writeStatusRegister : removed call to com/rox/apu/PulseChannel::setEnabled → KILLED 3. writeStatusRegister : negated conditional → KILLED |
pulse2.setEnabled((value & PULSE2_ENABLE_BIT) != 0); |
| 142 |
3
1. writeStatusRegister : removed call to com/rox/apu/TriangleChannel::setEnabled → KILLED 2. writeStatusRegister : negated conditional → KILLED 3. writeStatusRegister : Replaced bitwise AND with OR → KILLED |
triangle.setEnabled((value & TRIANGLE_ENABLE_BIT) != 0); |
| 143 |
3
1. writeStatusRegister : negated conditional → KILLED 2. writeStatusRegister : removed call to com/rox/apu/NoiseChannel::setEnabled → KILLED 3. writeStatusRegister : Replaced bitwise AND with OR → KILLED |
noise.setEnabled((value & NOISE_ENABLE_BIT) != 0); |
| 144 |
3
1. writeStatusRegister : negated conditional → KILLED 2. writeStatusRegister : Replaced bitwise AND with OR → KILLED 3. writeStatusRegister : removed call to com/rox/apu/DMCChannel::setEnabled → KILLED |
dmc.setEnabled((value & DMC_ENABLE_BIT) != 0); |
| 145 |
1
1. writeStatusRegister : removed call to com/rox/apu/DMCChannel::clearIrq → KILLED |
dmc.clearIrq(); |
| 146 | } | |
| 147 | ||
| 148 | /** The {@link Mixer} combined analog output of all five channels */ | |
| 149 | public double outputSample(){ | |
| 150 |
1
1. outputSample : replaced double return with 0.0d for com/rox/apu/APU::outputSample → KILLED |
return Mixer.mix( |
| 151 | pulse1.outputSample(), | |
| 152 | pulse2.outputSample(), | |
| 153 | triangle.outputSample(), | |
| 154 | noise.outputSample(), | |
| 155 | dmc.outputSample() | |
| 156 | ); | |
| 157 | } | |
| 158 | ||
| 159 | /** | |
| 160 | * True whenever either IRQ source within the APU is asserted (frame sequencer or DMC). A pure | |
| 161 | * query with no side effects (unlike {@link #readStatusRegister()}, which clears the frame-IRQ | |
| 162 | * flag) - callers re-evaluate this every tick to drive a level-sensitive CPU IRQ line. | |
| 163 | */ | |
| 164 | public boolean isIrqAsserted(){ | |
| 165 |
3
1. isIrqAsserted : replaced boolean return with true for com/rox/apu/APU::isIrqAsserted → KILLED 2. isIrqAsserted : negated conditional → KILLED 3. isIrqAsserted : negated conditional → KILLED |
return frameSequencer.isFrameIrqPending() || dmc.isIrqPending(); |
| 166 | } | |
| 167 | ||
| 168 | /** | |
| 169 | * Handle a $4015 read. | |
| 170 | * | |
| 171 | * Register: IF-D NT21 | |
| 172 | * I (bit 7): DMC-IRQ pending (NOT cleared by this read - only by a $4015 write) | |
| 173 | * F (bit 6): frame-IRQ pending (cleared by this read) | |
| 174 | * D (bit 4): DMC still has sample bytes to fetch | |
| 175 | * N/T/2/1 (bits 0-3): that channel's length counter is nonzero | |
| 176 | */ | |
| 177 | private int readStatusRegister(){ | |
| 178 | int status = 0; | |
| 179 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(pulse1.isLengthCounterActive(), PULSE1_STATUS_BIT); |
| 180 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(pulse2.isLengthCounterActive(), PULSE2_STATUS_BIT); |
| 181 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(triangle.isLengthCounterActive(), TRIANGLE_STATUS_BIT); |
| 182 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(noise.isLengthCounterActive(), NOISE_STATUS_BIT); |
| 183 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(dmc.isActive(), DMC_ACTIVE_BIT); |
| 184 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= bitIf(dmc.isIrqPending(), DMC_IRQ_FLAG); |
| 185 | ||
| 186 |
1
1. readStatusRegister : negated conditional → KILLED |
if (frameSequencer.isFrameIrqPending()) { |
| 187 |
1
1. readStatusRegister : Replaced bitwise OR with AND → KILLED |
status |= FRAME_IRQ_FLAG; |
| 188 |
1
1. readStatusRegister : removed call to com/rox/apu/FrameSequencer::clearFrameIrq → KILLED |
frameSequencer.clearFrameIrq(); // side effect: reading $4015 clears this on real hardware |
| 189 | } | |
| 190 | ||
| 191 |
1
1. readStatusRegister : replaced int return with 0 for com/rox/apu/APU::readStatusRegister → KILLED |
return status; |
| 192 | } | |
| 193 | ||
| 194 | /** Return bit that should be modified if condition is met, otherwise 0 */ | |
| 195 | private static int bitIf(boolean condition, int bitMask){ | |
| 196 |
1
1. bitIf : negated conditional → KILLED |
return condition ? bitMask : 0; |
| 197 | } | |
| 198 | ||
| 199 | /** Every channel's and the frame sequencer's complete state - see {@link ApuSnapshot}. */ | |
| 200 | public ApuSnapshot snapshot(){ | |
| 201 |
1
1. snapshot : replaced return value with null for com/rox/apu/APU::snapshot → KILLED |
return new ApuSnapshot(frameSequencer.snapshot(), pulse1.snapshot(), pulse2.snapshot(), triangle.snapshot(), |
| 202 | noise.snapshot(), dmc.snapshot()); | |
| 203 | } | |
| 204 | ||
| 205 | /** Puts every channel and the frame sequencer back exactly as {@code snapshot} captured them. */ | |
| 206 | public void restore(final ApuSnapshot snapshot){ | |
| 207 |
1
1. restore : removed call to com/rox/apu/FrameSequencer::restore → KILLED |
frameSequencer.restore(snapshot.frameSequencer()); |
| 208 |
1
1. restore : removed call to com/rox/apu/PulseChannel::restore → KILLED |
pulse1.restore(snapshot.pulse1()); |
| 209 |
1
1. restore : removed call to com/rox/apu/PulseChannel::restore → KILLED |
pulse2.restore(snapshot.pulse2()); |
| 210 |
1
1. restore : removed call to com/rox/apu/TriangleChannel::restore → KILLED |
triangle.restore(snapshot.triangle()); |
| 211 |
1
1. restore : removed call to com/rox/apu/NoiseChannel::restore → KILLED |
noise.restore(snapshot.noise()); |
| 212 |
1
1. restore : removed call to com/rox/apu/DMCChannel::restore → KILLED |
dmc.restore(snapshot.dmc()); |
| 213 | } | |
| 214 | } | |
Mutations | ||
| 79 |
1.1 |
|
| 80 |
1.1 |
|
| 81 |
1.1 |
|
| 82 |
1.1 |
|
| 83 |
1.1 |
|
| 84 |
1.1 |
|
| 85 |
1.1 |
|
| 86 |
1.1 |
|
| 91 |
1.1 |
|
| 96 |
1.1 |
|
| 97 |
1.1 |
|
| 105 |
1.1 |
|
| 106 |
1.1 |
|
| 108 |
1.1 |
|
| 109 |
1.1 |
|
| 110 |
1.1 |
|
| 111 |
1.1 |
|
| 113 |
1.1 |
|
| 114 |
1.1 |
|
| 115 |
1.1 |
|
| 116 |
1.1 |
|
| 118 |
1.1 |
|
| 119 |
1.1 |
|
| 120 |
1.1 |
|
| 122 |
1.1 |
|
| 123 |
1.1 |
|
| 124 |
1.1 |
|
| 126 |
1.1 |
|
| 127 |
1.1 |
|
| 128 |
1.1 |
|
| 129 |
1.1 |
|
| 140 |
1.1 2.2 3.3 |
|
| 141 |
1.1 2.2 3.3 |
|
| 142 |
1.1 2.2 3.3 |
|
| 143 |
1.1 2.2 3.3 |
|
| 144 |
1.1 2.2 3.3 |
|
| 145 |
1.1 |
|
| 150 |
1.1 |
|
| 165 |
1.1 2.2 3.3 |
|
| 179 |
1.1 |
|
| 180 |
1.1 |
|
| 181 |
1.1 |
|
| 182 |
1.1 |
|
| 183 |
1.1 |
|
| 184 |
1.1 |
|
| 186 |
1.1 |
|
| 187 |
1.1 |
|
| 188 |
1.1 |
|
| 191 |
1.1 |
|
| 196 |
1.1 |
|
| 201 |
1.1 |
|
| 207 |
1.1 |
|
| 208 |
1.1 |
|
| 209 |
1.1 |
|
| 210 |
1.1 |
|
| 211 |
1.1 |
|
| 212 |
1.1 |